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Simultaneous optimization of memory configuration and code allocation for low power embedded systems
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- 要約等This paper proposes a hybrid memory architecture which consists of the following two regions; 1) a dynamic power conscious region which uses low Vdd and Vth and 2) a static power conscious regi...... uses high Vdd and Vth. This pape......so proposes an optimization problem for finding the optimal memory division ratio, the code allocation, ²ratio and Vdd so as to m......mize the total power consumption of the memory under constraints of static noise margin (SNM), memory access delay and area overhead.......that the total power consumption ca......0.8% with 7.7% memory array area ove......t degradations of SNM and access delay. The 18t...
- 件名Low power design On-chip memory code allocation
- 出版者（掲載誌）Association for Computing Machinery
Simultaneous optimization of memory configuration and code allocation for low power embedded systems
デジタル記事
インターネットで読める全国の図書館
- 件名Low power design On-chip memory code allocation
- 一般注記The 18th ACM Great Lakes symposium on VLSI : May 04-06, 2008 : Orlando, Florida, USA
- 関連情報Proceedings of the 18th ACM G......posium on VLSI || || p403-406 http://www.slrc.kyus...
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