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デジタル記事
坂井, 篤, 山田, 節, 松下, 欣史, 安浦, 寛人Institute of Electrical and Electronics Engineers2003-10IEEE Transactions on Very Large Scale Integration (VLSI) Systems11 5p.951-954
インターネットで読める全国の図書館
デジタル記事
2003-10IEEE Transactions on Very Large Scale Integration (VLSI) Systems11 5p.951-954
インターネットで読める全国の図書館
  • 要約等...-a-chip (SoC). By optimizing the individual layer’s routing grid space, coupling effects such as crosst......ariations, and coupling power consumpt......e performed on the design of an image proce......nnects. Simply by employing our ......sed technique, the maximum delay and the power consumpt......simultaneously by up to 15% and ......, without any other process improvements.
  • 出版者(掲載誌)Institute of Electrical and Electronics En...

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