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インターネットで読める国立国会図書館全国の図書館
- 要約等This paper investigates the effect of Inter-Core Aggregation Scheduler (IAS) with memory program of SysBench. IAS is a kernel-level thread scheduler which executes sibling threads, threads sharing the memory address space, simultaneously on different proc...... cores (Cores) of a Chip-Multi Processor. IAS is a promising scheduler to reduce the capacity pressure on the shared L2 cache and enhance the performance. Previously, we showed that IAS enhanced the performance in running a Web application benchmark. To clarify the relationship between the characteristic of thread behavior and the effect of IAS, we estimate its effec...
- 件名Thread scheduling Multi-threaded application Parallel execution Cache misses Chip Multi-Processi...
- 著者標目Satoshi Yamada Shigeru Kusakabe
デジタル記事
インターネットで読める全国の図書館
- 件名Thread scheduling Multi-threaded application Parallel execution Cache misses Chip Multi-Processi...
- 関連情報https://portal.isee.kyushu-u.ac.jp/
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