検索結果 6 件
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- 要約等This paper proposes a code placement problem, its ILP formulation, and a heuristic algorithm for reducing the t......consumption of embedded processor syst...... core, on-chip and off-chip memories. Our approach exploits a non-cacheable memory region for an effective use of a cache memory and as a result, r......eously finds a code layout for a cacheable region, a scratchpad region, and the other non-cacheable region of ......g a commercial embedded processor and an off-chip SD...... system by 23% without any performance degradation compared to ...
- 標準番号（その他）https://hdl.handle.net/2324/13160
- 件名Code placement Energy reduction Embedded processor
デジタル記事
インターネットで読める全国の図書館
- 件名Code placement Energy reduction Embedded processor
デジタル記事
全国の図書館
- 件名Hardware and Architecture Modeling and Simulation Information Systems ......cience Control and Systems Engineering
- 参照Partitioning and Allocation of ......tch-Pad Memory for Energy Minimization of Priori...
- 出版者（掲載誌）Springer Science and Business Media LLC
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