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- 要約等In this paper, we introduce a design method for a low power digital baseband processing circuit. In particular, we focus on a digital FIR(Finite Impulse Response) filter that is a part of the digital baseband processing. Because the digital filter contains large power consuming components, such as adders and multipliers. We propose a design method to reduce power consumption of the digital FIR filter circuit by opt......the mutipliers and the adders. We found that the power consumption and the circuit area of digital FIR filter circuit designed by our approach are about 82.8 % reduction and 67.3 % reduction compared with the digital filter wh...
- 著者標目Tarumi Kousuke Tsujimoto Taizo Yasuura Hiroto
- 出版者（掲載誌）International Symposium on Information Science and Electrical Engineering
デジタル記事
インターネットで読める全国の図書館
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