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- 要約等To reduce power dissipation of LSI drastically, it is very effective to lower supply voltage, for example from 5V to......3V to 1.5V, because power dissipation is proportional to the square of supply voltage. However, re...... of supply voltage results in the increase of propagation delay of the constituent gates. In case of PFD (Phase Frequency Detector) which is one ...... components of PLL (Phase Locked Loop), increase of the propagation delay deteriorates its phase detecting characteristics and therefore pull-in characteristics of the PLL. One of the so......ruction of PFD with dynamic CMOS gates as we proposed in our e...
- 件名PFD PLL Dynamic CMOS Low power Low supply voltage
- 関連情報https://portal.isee.kyushu-u.ac.jp/
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