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デジタル記事
井上, 弘士, Moshnyaga, Vasily G., 村上, 和彰Association for Computing Machinery2002-08Proc. of 2002 International Symposium on Low Power Electronics and Design (ISLPED'02)p.148-153
インターネットで読める全国の図書館
  • 関連情報Proc. of 2002 International Symposium on ......er Electronics and Design (ISLPED'02) || || p148-153 http:.......csce.kyushu-u.ac.jp/SOC/index_j.html
  • 著者標目井上, 弘士 Moshnyaga, Vasily G. 村上, 和彰
デジタル記事
2002-08Proc. of 2002 International Symposium on Low Power Electronics and Design (ISLPED'02)p.148-153
インターネットで読める全国の図書館
  • 要約等This paper proposes a history-based tag-comparison scheme for reducing energ......ion of direct-mapped instruction caches. The proposed cache efficiently exploits programexecution foot......orded in the Branch Target Buffer (BTB), and attempts to detect and eliminate unnecessary tag checks at run time. Simulation results show that our approach can eliminate up to 95% of tag checks, saving the cache energy by 17%, while affecting the processor performance by only 0.2%.
  • 標準番号(その他)https://hdl.handle.net/2324/5632
  • 著者標目井上, 弘士 Moshnyaga, Vasily G. 村上, 和彰

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